The XtremeEDA Multi-Processor Platform (XMPP) is a development vehicle in the design and design verification (DV) of configurable multi-processor platforms, focusing on ARM/RISC-V processors and associated peripherals. XMPP is one of many ways XtremeEDA consultants grow understanding and skill sets in areas that will benefit our clients. In this blog entry I will discuss the design of the XMPP, the overall architecture, and some of the design challenges we faced.
The goal of XMPP is to allow XtremeEDA consultants to gain experience in the following:
- Implementation aspects of the ARM and RISC-V System Architectures
- AMBA Buses and Peripherals
- UVM Object Oriented Methodologies
- Parametric customization for both RTL and DV
- Low power (UPF) implementation
- Design for Debug (DFD) CoreSight implementation.
We’ve chosen to focus on these areas for several reasons. First, our client base has pointed at ARM and RISC-V as key technologies for future products. ARM, of course, is well established, and RISC-V continues to grow in popularity. Our roles within client teams are regularly tied to development of co-processors and peripherals which is why we’re tending toward a focus on bus architecture and connectivity. Our clients also require assistance in implementing low-power and debug technologies. While we have consultants with such expertise, this platform allows for significant expansion in our knowledge base for these areas. Additionally UVM is fundamental to functional verification so building our UVM experience by applying it across XMPP is great preparation for future client engagements. Finally, there’s the complement to our core design and verification expertise related to parameterizing/customing design and verification IP.
XMPP is being developed with small-duration milestones and in modular fashion to allow for ease of handoffs and milestone completion as our engineering staff transitions between client engagements. It’s typical for our engineering staff to have anywhere from a couple weeks to a couple months between client engagements, so continuously working small deliverables is a great way for us to maintain production with dynamic development teams.
Initial development of the XMPP utilized the ARM Cortex-M0 Design Start Kit, which gave the team a start point for the project and allowed for quickly bringing up an initial XMPP system. The design has expanded to include other ARM CPU cores and peripherals, with RISC-V incorporation currently under development.
Below is a diagram of the current XMPP architecture. We chose this architecture because of it’s flexibility and because it allows for quickly building custom systems using Verilog parameters.Design aspects that can be parameterized through a single Verilog package file include:
- Number of Processing Cores (Up to 16)
- Types of Processing Cores (Cortex-M*, RISC-V, etc.)
- Processing Core Address Remapping
- Physical Aspects of Memory
- Size of Memory
- Address Mapping of Memory, AHB/APB Components
- Instantiation of APB Components
- Per Core Interrupt Assignments.
One of the design challenges to enable a configurable architecture was to flexibly connect the Cores, Interconnect Fabric, RAM, and AHB/APB components without having to touch or regenerate the Top-Level RTL or any of the components. The solution involved extensive use of SystemVerilog Interfaces, which then allowed for the use arrays of Interfaces based on a parameter setting. This same approach was used in the XtremeEDA developed Multilayer AHB Interconnect Fabric this allowed for a fabric that supported configuration by parameters for the number of Masters/Slaves it utilized.
A second challenge was to integrate differing processor Cores, but to again avoid having to modify the Top-Level RTL. This was accomplished through the use of a Core wrapper which allowed differing cores to present a uniform interface at the Top-Level.
The development of the XMPP has involved many XtremeEDA consultants, to date over 25, which has allowed them each to both contribute to and benefit from this project. I personally have learned much about ARM and RISC-V processor architecture, along with the experience gained in the architectural development of the XMPP. The project also allowed me to get to know, work with, and learn from other XtremeEDA consultants. Being somewhat new to XtremeEDA (almost 1 year), what I have found through this experience is that we have an amazing group of consultants whose knowledge base is second to none.
UVM Gotchas: UVM Register Layer Prediction ModesJuly 17, 2018
by Robin Hotchkiss, Senior Verification Consultant What are we talking about? This post talks about the difference between implicit and […]Learn More
Open-Source RISC-V Verification for the NationJuly 10, 2018
By Jeremy Ralph, Principal Verification Engineer Many moons ago, as a new grad straight out of university, I started as […]Learn More
Portable Stimulus at a Minimum — by Neil JohnsonJune 6, 2018
Portable stimulus is becoming the new hot topic in verification that only got hotter with the release of the early […]Learn More
The 2 Faces of Debug – by Neil JohnsonMay 16, 2018
Recently, I was part of a discussion about the different types of bugs that can pop up for verification teams. […]Learn More